1. Field of the Invention
The present invention relates to a chemical vapor deposition apparatus, and more particularly to a chemical vapor deposition apparatus for creating a uniform electric field.
2. Description of the Related Art
In general, a liquid crystal display (LCD) controls a light transmittance of liquid crystal cells that are arranged in a matrix array on a liquid crystal display panel. Accordingly, the liquid crystal cells receive data signals, thereby displaying an image (picture). The LCD includes electrodes for supplying an electric field to a liquid crystal layer, a thin film transistor (TFT) for switching the data signals provided to the liquid crystal cells, a lower substrate having signal wiring for supplying the data signals to the liquid crystal cells and signal wiring for supplying control signals of the TFT, an upper substrate having a color filter, a spacer formed between the upper substrate and the lower substrate for providing a predetermined cell gap, and liquid crystal molecules disposed within a space provided between the upper substrate and the lower substrate.
During fabrication of the liquid crystal display device, a channel portion in an active layer of the TFT and a protective layer protecting the TFT are formed during plasma enhanced chemical vapor deposition (PECVD) processing. During PECVD processing, a gas is injected into a vacuum chamber. Then, at a specific pressure and substrate temperature, the injected gas decomposes into a plasma by use of a radio frequency (RF) voltage, thereby depositing materials onto a surface of the substrate. A quality of the deposited material is dependent upon the deposition conditions, such as the vacuum, the RF voltage, the RF voltage frequency, substrate temperature, reaction gas, and reaction pressure, for example. In addition, the deposited materials includes insulating films, semiconductor films, gate insulating films, protective films, and etch stopper films. The semiconductor films include amorphous silicon (a-Si:H) that form an active layer, and doped amorphous silicon (n+a-Si:H) that form a contact protective layer.
FIG. 1 is a cross sectional view of a plasma enhanced chemical vapor deposition (PECVD) apparatus according to a related art. In FIG. 1, the PECVD apparatus includes a gas jet 9 for releasing a gas to be deposited onto a substrate 7, and a chamber 1. The chamber 1 includes a susceptor 5 for applying heat via a heating coil to the substrate 7, a shadow frame 10 for securing the substrate 7, and a center pin 12 for separating the susceptor 5 from the substrate 7.
During processing, the substrate 7 is placed upon the susceptor 5 within the chamber 1, and the susceptor 5 applies heat to the substrate 7 and functions as a lower electrode for generating a plasma. A temperature of the susceptor 5 averages about 370° C. In addition, the susceptor 5 includes various pins formed to penetrate the susceptor 5.
The shadow frame 10 secures the substrate 7 within the chamber 1, and the center pin 12 rises by a pin plate 16 to prevent any drooping of the substrate 7. In addition, the center pin and pin plate 16 prevents formation of any scratches between a robot arm 14 and the substrate 7 during loading and unloading of the substrate 7. The pin plate 16 includes a center pin-supporting portion 18 having the center pin 12 passing through it.
FIGS. 2A to 2D show a process for loading a substrate into a chamber according to the related art.
In FIG. 2A, the substrate 7 is loaded into the chamber 1 by the robot arm 14, and the substrate 7, the susceptor 5, and the center pin 12 are not mutually contacting each other.
In FIG. 2B, the pin plate 16 rises to mount the center pin-supporting portion 18 in center pin mount portions 20 and 21 equipped on a rear surface of the susceptor 5, and each of corner pins 22 and 23 and the center pin 12 rise by a power driver (not shown) to lift the substrate 7.
In FIG. 2C, the robot arm 14 is separated from the substrate 7 by the power driver (not shown).
In FIG. 2D, the susceptor 5 rises by a susceptor-lifting portion 24 to make the susceptor 5 lift the substrate 7 and the center pin 12. Then, the susceptor 5 raises the substrate 7 close to the shadow frame 10. Accordingly, the substrate 7 is safely placed into a deposition position.
FIG. 3 is a cross sectional view representing an inside of a chamber according to the related art. In FIG. 3, the chamber 1 includes the substrate 7 safely placed upon the susceptor 5, and an upper electrode 30 that faces the substrate 7 with a predetermined gap therebetween. The center pin 12 raises the substrate 7 upon loading, and the susceptor 5 rises. Accordingly, the substrate 7 sustains a predetermined gap from the upper electrode 30, and the center pin 12 lowers into a center pin hole 19 formed on the susceptor 5. The center pin 12 is made of ceramic material that has a low coefficient of thermal expansion.
FIG. 4 is a cross sectional view of a center pin according to the related art as shown in FIG. 3. In FIG. 4, an insulating film Al2O3 is formed upon a head portion 3 of the center pin 12, thereby preventing electrical arcing during plasma processing. Accordingly, the center pin 12 is not ground to the susceptor 5. However, the heating coil (not shown) formed inside the susceptor 5 is ground with an external ground voltage source GND.
In FIG. 3, a radio frequency (RF) voltage source 32 is connected to the upper electrode 30. Accordingly, an electric field is generated between the upper electrode 30 and the substrate 7, whereby an insulating film or a semiconductor film is deposited upon a surface of the substrate 7. When depositing the insulating film or the semiconductor film on the substrate 7, the electric field emanating from the upper electrode 30 is bowed in a region of the center pin 12. Accordingly, an electric field density in a region of the center pin 12 is relatively low, thereby a thickness of the deposition film in the region of the center pin 12 will be thinner than surrounding regions.
FIG. 5 shows a defect resulting from the center pin according to the related art. In FIG. 5, a thickness of the deposition film in an area A of the substrate 7, which corresponds to a region of the center pin 12 (in FIG. 3), is different from a thickness of the deposition film in other regions.
FIG. 6 is a spectrum photograph showing the defect on a substrate illustrated in FIG. 5 according to the related art. In FIG. 6, the thickness of the deposition film in the area A of the substrate 7, which corresponds to the region of the center pin 12 (in FIG. 3), is relatively thinner than the thickness of the deposition film in the other regions.
FIG. 7 is a graph showing thickness distribution of a deposition film of the substrate 7 (in FIG. 5) taken along I–I′ of FIG. 6. In FIG. 7, the graphical distribution of deposition thickness of the deposition film on the substrate indicates that a defect is generated in a region corresponding to the center pin 12 (in FIG. 3). Accordingly, the defect degrades image quality of the liquid crystal display device.